Microstrip PCB Impedance Calculator
Calculate the characteristic impedance of a microstrip PCB trace from the substrate's dielectric constant, trace width, substrate height, and copper thickness. Essential for controlled-impedance routing in high-speed and RF designs.
PCB Trace Impedance Estimator
Microstrip PCB Impedance Formula
Where:
- \(Z_0\) — characteristic impedance of the microstrip trace (Ω)
- \(\varepsilon_r\) — relative dielectric constant (permittivity) of the substrate
- \(W\) — trace width (mm)
- \(H\) — substrate height, i.e. the distance from the trace to the ground plane (mm)
- \(T\) — copper trace thickness (mm)
This formula is a widely used closed-form approximation for a single microstrip line on a PCB. It accounts for the finite copper thickness, which effectively widens the trace and lowers the impedance.
Microstrip PCB Impedance – Calculation Example
Example: a standard 1.6 mm FR-4 board (\(\varepsilon_r = 4.5\)) with a 1 mm wide trace and 35 µm (1 oz) copper.
\[ Z_0 = \frac{87}{\sqrt{4.5 + 1.41}} \cdot \ln\left( \frac{5.98 \times 1.6}{0.8 \times 1 + 0.035} \right) \]
\[ Z_0 = \frac{87}{\sqrt{5.91}} \cdot \ln\left( \frac{9.568}{0.835} \right) = \frac{87}{2.431} \cdot \ln(11.459) = 35.78 \times 2.439 \approx 87.27~\Omega \]
Result: the characteristic impedance is approximately 87.3 Ω.
How to use the calculator
- Enter the Dielectric constant (εr) of your substrate — 4.4–4.7 for FR-4, around 3.0 for Rogers RO4350B, 2.1–2.2 for PTFE-based laminates.
- Enter the Trace width (W) in millimetres. This is the width of the copper trace on the signal layer.
- Enter the Substrate height (H) in millimetres — the thickness of the dielectric between the trace and the ground plane, not the total board thickness.
- Enter the Copper thickness (T) in millimetres — 0.035 mm for 1 oz copper, 0.070 mm for 2 oz copper.
- Read the Characteristic Impedance in ohms. Adjust the trace width and recalculate until you hit your target impedance.
What is microstrip impedance?
A microstrip is a flat conducting trace routed on an outer PCB layer, with a solid ground plane on the layer beneath it separated by dielectric material. This geometry behaves like a transmission line, and every transmission line has a characteristic impedance \(Z_0\) — the ratio of voltage to current of a wave travelling along it.
Because part of the field around a microstrip travels through air (\(\varepsilon_r \approx 1\)) and part through the substrate, the effective dielectric constant seen by the trace lies between that of air and that of the laminate. Wider traces lower the impedance, while a thicker substrate or a higher dielectric constant raises it.
Controlled impedance matters whenever the rise time of a signal is short compared to the trace's propagation delay — typically in USB, HDMI, Ethernet, PCIe, DDR memory, and RF circuits. If the trace impedance does not match the driver and receiver (commonly 50 Ω single-ended, 90 Ω or 100 Ω differential), part of the signal reflects at each discontinuity. These reflections cause ringing, overshoot, timing errors, and increased EMI.
For signals embedded between two reference planes, the geometry is called a stripline rather than a microstrip — see the Stripline Impedance Calculator. For two coupled traces, use the Stripline PCB Differential Impedance Calculator.
Assumptions and limitations
- Closed-form accuracy: the formula is an engineering approximation, typically accurate to a few percent for common geometries. For final sign-off of high-speed or RF designs, verify with a field solver or your fabricator's impedance report.
- Zero-thickness approximation improved: the \(0.8W + T\) term approximates the effect of copper thickness, assuming a rectangular trace cross-section. Trapezoidal etch profiles from manufacturing are not modelled.
- Suitable aspect ratios: the model works best for roughly \(0.1 < W/H < 2\). Very wide or very narrow traces deviate from the approximation.
- Homogeneous, isotropic substrate: glass-weave inhomogeneity in FR-4 can shift the local impedance, which matters for very high frequencies.
- No solder mask: solder mask over the trace slightly lowers the impedance (typically a few ohms). Many fabricators account for this; some designs leave controlled-impedance traces unmasked.
- Trace over a solid plane: the ground plane must be continuous and unbroken beneath the trace. Gaps or splits in the plane invalidate the calculation and create impedance discontinuities.
Practical tips
- To lower the impedance, widen the trace, thin the dielectric, or use a higher-\(\varepsilon_r\) material; to raise it, do the opposite.
- For a 50 Ω target on standard 1.6 mm FR-4 with 1 oz copper, you need roughly a 3 mm wide trace — often impractical, which is why 50 Ω designs typically use thinner dielectrics (e.g. 0.2 mm prepreg) with ~0.35–0.4 mm traces.
- Keep controlled-impedance traces at a consistent width along their entire length; every via, bend, or layer change introduces a discontinuity.
- If you need to couple energy between adjacent traces, estimate the coupling with the PCB Microstrip Crosstalk Calculator, and match sources to lines with the PI Network Impedance Matching Calculator.
Frequently Asked Questions
How do I convert mils and copper ounces to millimetres?
Many datasheets use imperial units. 1 mil = 0.0254 mm, so a 6-mil trace is 0.152 mm. Copper weight converts as: 0.5 oz ≈ 0.017 mm, 1 oz ≈ 0.035 mm, 2 oz ≈ 0.070 mm. Enter all four values in millimetres — mixing units is one of the most common sources of wrong results, often by a factor of 25 or more.
Why does my fabricator's impedance report differ from this calculator?
Fabricators use field solvers and measure the actual etched geometry. Real traces have trapezoidal cross-sections (typically 20–30° sidewall taper), solder mask lowers impedance by a few ohms, and FR-4 dielectric constant varies ±5–10% between lots and with frequency. A mismatch of 2–5 Ω is normal. For production, send your stackup to the fabricator and let them adjust the trace width to hit the target.
What is the effective dielectric constant of a microstrip?
Because the field lines above the trace pass through air and those below pass through the substrate, the line behaves as if it were in a dielectric between the two. A common estimate for W/H near 1 is \(\varepsilon_{eff} \approx (\varepsilon_r + 1)/2 + (\varepsilon_r - 1)/2 \cdot 1/\sqrt{1 + 12H/W}\). \(\varepsilon_{eff}\) is what determines propagation velocity and delay along the trace, not \(\varepsilon_r\) itself.
How do I calculate differential impedance (e.g. 90 Ω USB or 100 Ω Ethernet)?
Differential impedance is not simply twice the single-ended value: two coupled traces interact, and the coupling lowers the pair's impedance. A rough starting point is \(Z_{diff} \approx 2 Z_0 (1 - k)\), where k depends on trace spacing and height. Calculate each trace's single-ended impedance here first, then fine-tune the spacing with a differential-pair calculator or field solver to hit 90 Ω or 100 Ω.
Should I use the total board thickness as the substrate height?
No — this is the most frequent mistake. H is only the dielectric between the trace and its reference plane. On a 4-layer board, an outer-layer trace sits on prepreg that may be just 0.1–0.2 mm thick, not the 1.6 mm board. Using the wrong height can shift the result by 30–50 Ω. Always take H from the actual stackup drawing for the layer the trace is on.
How accurate is this formula compared to a field solver?
It belongs to the family of IPC-style closed-form equations, accurate to roughly 3–5% for typical geometries with 0.1 < W/H < 2 and εr below about 10. It does not model solder mask, trapezoidal etch, or roughness. That is fine for routing and early stackup planning; for sign-off of multi-gigabit or RF designs, cross-check with a 2D field solver such as Polar Si9000 or your fabricator's tool.
What if my trace is buried under other layers or covered in solder mask?
A trace between two ground planes is a stripline, not a microstrip — use a stripline calculator, as the field is fully enclosed in dielectric and the impedance comes out lower. A surface trace fully covered by solder mask is an embedded or coated microstrip: the mask (εr ≈ 3.5–4) lowers Z₀ by roughly 2–4 Ω on typical boards. Some fabs quote impedance with mask included; ask which case their numbers refer to.
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